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Volume 5, Issue 2
Modeling of Solder Joint Defects Through a Level-Set Approach

M. Kang & S. K. Patra

Int. J. Numer. Anal. Mod., 5 (2008), pp. 255-269.

Published online: 2008-05

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  • Abstract

Due to the inherent nature of flip-chip assembly, the solder joints lie beneath the device and therefore are not amenable to visual inspection. Hence, it is important at the design stage to ensure that solder defects such as joint separation or joint shortening do not occur in the assembly. As a first step, the solder joint is modeled using a level-set approach. Unlike conventional front-tracking approaches, the levelset method handles complicated profiles arising from merger/separation of solder joints naturally without user intervention. The model was established to determine the upper and lower limit on optimal solder volume as a function of a specific assembly configuration and is used to avoid such defects.

  • Keywords

levelset, solder-joint, flip-chip.

  • AMS Subject Headings

35Q80, 65K10, 65M06

  • Copyright

COPYRIGHT: © Global Science Press

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@Article{IJNAM-5-255, author = {M. Kang and S. K. Patra}, title = {Modeling of Solder Joint Defects Through a Level-Set Approach}, journal = {International Journal of Numerical Analysis and Modeling}, year = {2008}, volume = {5}, number = {2}, pages = {255--269}, abstract = {

Due to the inherent nature of flip-chip assembly, the solder joints lie beneath the device and therefore are not amenable to visual inspection. Hence, it is important at the design stage to ensure that solder defects such as joint separation or joint shortening do not occur in the assembly. As a first step, the solder joint is modeled using a level-set approach. Unlike conventional front-tracking approaches, the levelset method handles complicated profiles arising from merger/separation of solder joints naturally without user intervention. The model was established to determine the upper and lower limit on optimal solder volume as a function of a specific assembly configuration and is used to avoid such defects.

}, issn = {2617-8710}, doi = {https://doi.org/}, url = {http://global-sci.org/intro/article_detail/ijnam/810.html} }
TY - JOUR T1 - Modeling of Solder Joint Defects Through a Level-Set Approach AU - M. Kang & S. K. Patra JO - International Journal of Numerical Analysis and Modeling VL - 2 SP - 255 EP - 269 PY - 2008 DA - 2008/05 SN - 5 DO - http://doi.org/ UR - https://global-sci.org/intro/article_detail/ijnam/810.html KW - levelset, solder-joint, flip-chip. AB -

Due to the inherent nature of flip-chip assembly, the solder joints lie beneath the device and therefore are not amenable to visual inspection. Hence, it is important at the design stage to ensure that solder defects such as joint separation or joint shortening do not occur in the assembly. As a first step, the solder joint is modeled using a level-set approach. Unlike conventional front-tracking approaches, the levelset method handles complicated profiles arising from merger/separation of solder joints naturally without user intervention. The model was established to determine the upper and lower limit on optimal solder volume as a function of a specific assembly configuration and is used to avoid such defects.

M. Kang and S. K. Patra. (2008). Modeling of Solder Joint Defects Through a Level-Set Approach. International Journal of Numerical Analysis and Modeling. 5 (2). 255-269. doi:
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